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Altera_Forum's avatar
Altera_Forum
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9 years ago

FPGA hardware result different from simulation

Hi, I may be wrong, but I think this is where I should post this question. I'm working with the max10 development board . https://www.altera.com/products/boards_and_kits/dev-kits/altera/max-...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Hi GooGooCluster,

Thank you for the response. I figured it out. I messed up at the third point, the reset signals. I also ran into problems with setting/changing duty cycle and after some time, was a result of not debouncing.

I have verified everything to be working, so the points you described were on point. =]

I will look for the code tags in the future, thanks!

I would consider this resolved, do we need to flag this thread or anything?