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GMaji's avatar
GMaji
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7 years ago

FPGA ADC and IO signal conditioning circuit

Hi Team,

We are using FPGA 10M25SAE144C8G for our project. We have seen few FPGA failure in the PIN which are connected via SDI, SDO and CLK line of FPGA pin with External ADC ADS7952 IC. Please let us know if you are suggesting some circuit modifications here. I have attached the releted circuit f FPGA pin connection with External ADC circuit ( attached).

Also let us know if you need more information to solve the problem.

5 Replies

  • SreekumarR_G_Intel's avatar
    SreekumarR_G_Intel
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    7 years ago
    Hello, Would like to clarify you mean FPGA part got failed or functionality not working ? If the Part failed , Can you let me know FPGA connected to the another daughter board using connector ? Thank you , Regards, Sree
    • GMaji's avatar
      GMaji
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      7 years ago

      Hi Sreekumar,

      FPGA has failed physically, means I need to replace the IC to make to board working.

      FPGA is part of the same board, not connected using any daughter board and connector.

      Thanks and Regards

      Goutam

  • SreekumarR_G_Intel's avatar
    SreekumarR_G_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    7 years ago

    Hello Goutam ,

    Thank you . Can I know more about failure ? I mean Short to GND or open etc ?

    my question is why only that pins ?

    Thank you ,

    Regards,

    Sree

    • GMaji's avatar
      GMaji
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      7 years ago

      Hi Sree,

      It is short to ground only SDO, SDI and CLK Pins. Other Pins are ok. Let me know if you have any other questions. Please provide possible reason of failure these PINs only.

      Thanks and Regards

      Goutam

  • SreekumarR_G_Intel's avatar
    SreekumarR_G_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    7 years ago
    Hello Goutam , iam not sure how i can tell the reason for short to gnd only on that SPI lines. Failure looks wired to me .....:( ..Can I ask is that Bus is multiplexed with any other channel ? Did you check Max and ADC chip also not driving at the same time ? I am assuming voltage is 3.3V for FPGA and ADC chip correct ? thank you , Regardsa, Sree