smeng12New Contributor6 years agofpga上电通过AS-4的方式从flash加载后，进入用户模式，PCIE就能正常工作，如果需要通过PCIE更新用户逻辑(updata模式)，需要将PCIE切换到CVP模式，请问如何到切换CVP模式？以及PCIE的CSR和VSEC寄存器如何控制加载？谢谢
YuanLi_S_IntelRegular Contributor6 years ago是的。您可以参考以下网页：https://www.intel.com/content/www/us/en/programmable/support/support-resources/support-centers/devices/cfg-index/cfg-via-protocol.html
Recent DiscussionsAgilex™ 7 FPGA M-Series Development Kit_HBM2e Edition_REVB2_AlteraAgilex 7 R-Tile PIPE Direct endpoint receives Set_Slot_Power_Limit, but no Config TLPsSyncE clock as the reference for DDR, HBM, and FPGA control interfaces in the Agilex M-Series designR-tile CXL base hard IP example for the Agilex 7 M-series Dev Kit (DK_DEV_AGM039EA) does not workPCIe Root Complex on DK-A5E013BM16AEA
New ContributorNew ContributorNew Contributor
