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TWatt's avatar
TWatt
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7 years ago

file missing compile error Cyclone X GX FPGA development kit example qts_pcie_sfp

I have a Cyclone X GX FPGA development kit. I am trying to compile one of the example projects in Quartus (qts_pcie_sfp) but am getting an error (see below):

Error (13225): Can't open VHDL or Verilog HDL file "ip/xcvr_test_system/xcvr_test_system_data_pattern_generator_0/altera_avalon_data_pattern_generator_180/synth/xcvr_test_system_data_pattern_generator_0_altera_avalon_data_pattern_generator_180_xz7276a.v"

Error (13223): Verilog HDL or VHDL error: cannot open verilog file 'ip/xcvr_test_system/xcvr_test_system_data_pattern_generator_0/altera_avalon_data_pattern_generator_180/synth/xcvr_test_system_data_pattern_generator_0_altera_avalon_data_pattern_generator_180_xz7276a.v'

The file is there, so how do I resolve this error?

Thanks.

5 Replies

  • Hi Twatt,

    Our first level engineer duplicated this issue internally. Therefore, we've escalate this to our engineering team. An internal bug was opened and we will keep you posted once we make progress.

    Thanks,

    Joseph

    Intel Customer Support

    610018

  • Hi Twatt,

    Just to let you know we are not hearing back from our engineering yet. We will continue to follow up this...

    Thanks,

    Joseph

    Intel Customer Support

  • Busy's avatar
    Busy
    Icon for New Contributor rankNew Contributor

    Hello,

    I've got same error using NIOS2 CPU (NIOS2 + Cyclone 10GX220 + Quartus 18.1). Did you resolve your problem?

    Many thanks.

  • AnandRaj_S_Intel's avatar
    AnandRaj_S_Intel
    Icon for Regular Contributor rankRegular Contributor

    Hi,

    The error is due to directory path length by having smaller working directory / path length we can solve it.

    Regards

    Anand