Forum Discussion
AAjit2
New Contributor
New ContributorFIFO Block Implementation error
I tried writing my own version of FIFO block but I can't seem to understand how the read data stages shift out of the FIFO pushing down the stages above it all the while continuously writing into the...
To my best understanding in FIFO, it should have two separate control logic blocks to perform read and write on a RAM. It uses a pointer to determine which address to do the read or write operation. Hence, NOT really need shift the data from one location to another.
GuaBin_N_Intel
Contributor
ContributorTo my best understanding in FIFO, it should have two separate control logic blocks to perform read and write on a RAM. It uses a pointer to determine which address to do the read or write operation. Hence, NOT really need shift the data from one location to another.
AAjit2New Contributor
New ContributorWait, so if the data isn't shifted, how does the read data removed once it's read out? With the pointers it would seem as though it just keeps reading up until the FIFO is full without clearing the previous data.
