FIFO Block Implementation error
I tried writing my own version of FIFO block but I can't seem to understand how the read data stages shift out of the FIFO pushing down the stages above it all the while continuously writing into the FIFO from the outside. To give an example say I write a b c into the FIFO at 1 2 3 position, at c I start reading the data so a comes out and b becomes 1 and c becomes 2. However while I'm reading out data, I want data to be written in and not at 4 because 3 is now empty as c is in 2. So how do I write the code such that both processes happen side by side yet the shifting is also happening. Any help with this is much appreciated.
To my best understanding in FIFO, it should have two separate control logic blocks to perform read and write on a RAM. It uses a pointer to determine which address to do the read or write operation. Hence, NOT really need shift the data from one location to another.