Forum Discussion
Altera_Forum
Honored Contributor
14 years agoThe USB-Blaster circuit is a FT245BM and a CPLD.
The host communicates with the USB-Blaster via a protocol described here: http://sourceforge.net/apps/mediawiki/urjtag/index.php?title=cable_altera_usb-blaster The parallel output data from the FT245BM FIFO is serialized by the CPLD to drive the JTAG pins on the attached FPGA. The highest performance mode will be when the packets are 'byte-mode' packets, where each byte from the host generates 8-bits of of JTAG TDI activity. I haven't got performance measurements yet, but the best data rate will be 1MB/s divided by 8, or about 1Mbps. Under Linux, using the FTD2XX direct access drivers, you can add the VID/PID of the USB-Blaster, and then access the device. The direct access API functions for adding a custom VID/PID do not exist under Windows, so I'm not sure what the solution is there (probably edit an .inf file). Cheers, Dave