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MBurk9's avatar
MBurk9
Icon for New Contributor rankNew Contributor
6 years ago

[Failed] while downloading non-volatile *.jic File into FPGA

There is a problem, in downloading a non-volatile *.jic File into FPGA. Depending on *.sof, sof can download to the board. The problem comes with jic file. Maybe while converting, or writing on DE...
JohnT_Altera's avatar
JohnT_Altera
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

I am glad that the issue is resolved. Could you confirm if your MSEL is correct?

The reason is that MSEL = 10010 should the correct setting. Please double confirm if you the SW is high or low.