Forum Discussion
Altera_Forum
Honored Contributor
11 years agoFailed to load ddr3 design.sof using board test system
Hi , I am working on a max10 development kit (with MAX1050DA fpga device on it) and I have installed fpga development software kit to configure ddr3 design (it has other design examples but i ...
Altera_Forum
Honored Contributor
11 years agoI am also seeing the same error. I got that error when simply re-compiling the original design. The design did not meeting timing, and wasn't really even close. I am attempting to close timing without making any major changes, in the hopes that this will resolve the error. I am using 15.0.0.145. It appears that the provided design had been compiled with 15.0.0.139, which I believe had a patch related to Max10 DDR3. I assumed that the patch was included in this later version, but that may not be a valid assumption. Are you able to confirm that you were able to get a .sof that you created to work?