EP4CE75U19I7N

Hi leo12345678,

​

对于​FPGA的引脚阻抗，我们没有提供明确的标准。

​

从您提供的测试流程来看，主要​想要测试的是 1.2 V 供电引脚 (H11 VCCINT) 是否有对地的阻抗问题对吗？

从测试结果来看，最终结果是​“NG 板子的 FPGA 芯片 1.2v 对地阻抗为 18.55Ω；OK 板子上的 FPGA 芯片的 1.2v 对地阻抗为 34Ω”。是单一的电阻结果。

​

正如我前面提到的​，我们推荐的测试方法是进行I/V曲线测试。因为FPGA引脚不是纯阻性结构，如果只有单一的电阻值，实际上无法判断引脚是否产生了损坏。获取I/V曲线之后，观察 0V 电压附近是否出现了阻性的电流表现（正常的I/O在 0V 电阻附近应该不出现导通电流）。

We did not provide a clear standard for the pin impedance of FPGA.

From the testing process you provided, the main thing you want to test is whether there is an impedance problem to ground from the 1.2 V power supply pin (H11 VCCINT), right?

From the test results, the final result is that "the 1.2v impedance of the FPGA chip on the NG board to ground is 18.55 Ω; the 1.2v impedance of the FPGA chip on the OK board to ground is 34 Ω." It is a single resistance result.

As I mentioned in the previous message, our recommended testing method is to perform I/V curve test. Because FPGA pins are not pure resistive structures, if only a single resistance value is used, we are not able to determine whether the pins have been damaged. After obtaining the I/V curve, observe whether there is resistive current near the 0V voltage (normal I/O should not have conduction current near the 0V resistance).

​

Thanks & Regards,

Xiaoyan