Forum Discussion
I have done some further testing. And I was able to receive somewhat correct data when reading the RX_pma register out via systemconsole (the order was sometimes wrong of the 10 bit values).
Nevertheless, the values I receive from the rx_parallel_data interface are still completely wrong.
I looked further into it and found that there is quite a big skew :
-90.758 u0|etile|xcvr_native_s10_etile_0|g_pma_rsfec_reset.g_auto_reset.reset_ip_auto_etile_inst|reset_control_inst|g_rx.g_rx[0].g_rx.counter_rx_ready|r_reset u0|qsys_rx_snapshot_fifo|qsys_rx_snapshot_fifo|dcfifo_component|auto_generated|fifo_altera_syncram|altera_syncram_impl1|ram_block2a0~reg0 ALTERA_INSERTED_INTOSC_FOR_TRS|divided_osc_clk u0|etile|xcvr_native_s10_etile_0|rx_clkout|ch0 1.600 -90.864 1.384 Slow 900mV 100C Model
Could this be the cause of this problem ?