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cosx's avatar
cosx
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Dynamic Phase shift Implementation of PLL

Hi everyone, I am currently using Cyclone V 5CSEMA5F31C6NF device to design a testbench, with PLL being used. I want to perform dynamic phase shift operation on this PLL and so I set its parameters...
EngWei_O_Intel's avatar
EngWei_O_Intel
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

Hi Mingqiang

The dangling output port is based on the operation mode, usage setting and explicit connection that we have implemented. The purpose of logical counter usage can be found here:

Thanks.

Eng Wei