Forum Discussion

kwkprd's avatar
kwkprd
Icon for New Contributor rankNew Contributor
1 year ago

Default status on IO pins after program.

Recently i have worked on probing the FMC in scope and seen a sine wave immediately after programming the FPGA sof having the prbs generator. i want to know the status of FPGA IO's after programing. ...
Board Debug
Fpga Devkit
FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
1 year ago

Hi,

after programming, respectively in user mode, IOs are controlled by your design. All assigned IO pins take the state you have defined. Unassigned pins get a default state (e.g. tristated with weak-pullup) specified in Quartus Assignments/Device/Device and Pin Options/Unused Pins.