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Altera_Forum
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13 years ago

DE2 boards revisions ?

Hello I am an experienced SoC designer, with only little practice with Altera FPGA. To start with, I have designed a small circuit (for teaching purpose), that simulates and synthesizes c...
Altera_Forum's avatar
Altera_Forum
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13 years ago

Hello Dave

Thx for the reply. In your file I read :

set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"

Is this a recommended design rule for Altera boards ? I was suspecting something like that (that I didn't apply).

Thx again

JCLL