You can use 16 bits instead. Pulled this code from ousmu. It should work.
Sdram_Control_4Port u8 ( // HOST Side
.REF_CLK(iCLK_50_2),
.RESET_N(1'b1),
.CLK(sdram_ctrl_clk),
// FIFO Write Side 1
.WR1_DATA({drRed[11:7], drGreen[11:6], drBlue[11:7]}),
.WR1(sCCD_DVAL),
.WR1_ADDR(0),
.WR1_MAX_ADDR(800*480),
.WR1_LENGTH(9'h100),
.WR1_LOAD(!DLY_RST_0),
.WR1_CLK(CCD_PIXCLK),
// FIFO Read Side 1
.RD1_DATA(Read_DATA3),
.RD1(Read),
.RD1_ADDR(0),
.RD1_MAX_ADDR(800*480),
.RD1_LENGTH(9'h100),
.RD1_LOAD(!DLY_RST_0),
.RD1_CLK(~ltm_nclk),
// SDRAM Side
.SA(oDRAM0_A[11:0]),
.BA(oDRAM0_BA),
.CS_N(oDRAM0_CS_N),
.CKE(oDRAM0_CKE),
.RAS_N(oDRAM0_RAS_N),
.CAS_N(oDRAM0_CAS_N),
.WE_N(oDRAM0_WE_N),
.DQ(DRAM_DQ[15:0]),
.DQM({oDRAM1_UDQM0,oDRAM0_LDQM0})
);
// add by oomusou for RGB16
assign Read_DATA4 = {Read_DATA3[10:6], Read_DATA3[4:0], 5'h00};
assign Read_DATA5 = {Read_DATA3[5:5], 4'h0, Read_DATA3[15:11], 5'h00};