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Here is my very basic knowledge at this points about Jtag,
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JTAG is simply a synchronous serial interface, i.e., it has a clock, data in, data out, and a mode/select bit. Its no more difficult to understand than SPI. However, unlike SPI, there is a standard 'state machine' called the TAP (test access port), which includes instruction and data registers, which you load and read to perform JTAG transactions.
Altera has layered their Virtual JTAG Interface on top of JTAG. The Virtual JTAG interface is implemented in the fabric of the FPGA. Altera define a couple of JTAG instructions for manipulating their Virtual Instruction register and Virtual Data register. This is all explained in this document:
http://www.ovro.caltech.edu/~dwh/correlator/pdf/vjtag.pdf If this seems overly complicated, you could always just connect a UART to pins on the DE2-115 and write a serial port application. FTDI make several cables that I use;
http://www.digikey.com/product-detail/en/c232hm-ddhsl-0/768-1106-nd/2714139 http://www.digikey.com/product-detail/en/c232hd-ddhsp-0/768-1011-nd/2767783 Cheers,
Dave
Honored Contributor
