--- Quote Start ---
so since they both LCD_ON (except capital letters, does it matter?)
--- Quote End ---
VHDL is case-insensitive, so it does not matter.
Quartus will answer these questions for you - synthesize the design and read the warning messages. Look at the messages related to missing assignments. Then look at the .pin file and manually check every single pin.
The key to using a top-level file like de2.vhd is that you only have to write the top-level file and constraints *ONCE*, and then carefully check the assignments. For future designs, you use the same top-level design as a template, and you know that the port names and pin assignments are all correct (since you checked them carefully for the first design).
Cheers,
Dave
Honored Contributor
