DE10-Nano Handling FPGA interrupts

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Hello,

I'm trying to find info on how to handle an IRQ from FPGA to HPS via f2h_irq0 Interrupt Receiver.

For now I don't have a clue. I just found info on how to handle GPIO like KEY0 or KEY1 but they are mapped to the HPS region.

I hope to capture edge interrupts from SW[4..0]. Maybe I can find somebody with experience with this here.

Regards!

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Hello.

For baremetal application use hardware libs routines for interrupt control and ISR handler registration.