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Syuan_5728's avatar
Syuan_5728
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2 years ago

DE10-nano FPGA write to HPS SDRAM controller

I am currently attempting to create an Avalon Master in the FPGA section on the DE10-nano board, and I'm trying to use the FPGA2HPS_sdram bridge to write data to the SDRAM controller in the HPS. ...
Fpga Devkit
mabdrahi's avatar
mabdrahi
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2 years ago

Hi


Actually what happens is that the signal cannot access the memory because it has been used by linux


That's why the signal tap won't work



  • Syuan_5728's avatar
    Syuan_5728
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    2 years ago

    In fact, I have also had doubts about this reason. However, even after removing the SD card with the Linux boot program and restarting the power, SignalTap still shows the same response (the Waitrequest signal remains high).

    Moreover, I have followed the instructions in the provided GitHub link (https://github.com/zangman/de10-nano/blob/master/docs/FPGA-SDRAM-Communication_-Avalon-MM-Host-Master-Component-Part-3.md) to reserve 512MB of DDR3 SDRAM to prevent it from being occupied by Linux. So, this is still perplexing me.

    And indeed, while running the Linux system, I can use BusyBox to query that the data I need has been written into the reserved 512MB space.

    In any case, thank you for your assistance. I will continue to search for a reasonable answer.