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zangman
Icon for Occasional Contributor rankOccasional Contributor
4 years ago
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de10-nano (cyclone V) - FPGA read and write from HPS SDRAM - need general direction

I would like to access the DDR SDRAM on the HPS from the FPGA fabric. I know I can enable it in the HPS component in Platform Designer and it shows `f2h_sdram0_data` as an Avalon Memory Mapped Slave....
  • zangman's avatar
    zangman
    4 years ago

    Thanks Anil! I was really in the dark as I didn't know where to begin. After a fair bit of research, I figured out what is needed:

    • We need to enable the f2h_sdram0_data in the HPS in platform designer. This interface includes Avalon Slaves with the Burst interface
    • Create an Avalon MM Master that supports burst interface to interact with the SDRAM
    • Regarding DMA: A DMA is used to save CPU cycles by moving memory from one location to another. It's not needed for my requirements as I just want to access something in SDRAM and do something immediately with it.

    I started documenting all the steps in great detail at the link below. It's still a WIP but hopefully will be able to finish it soon and somebody new to SoCs (like myself) will find it useful:

    https://github.com/zangman/de10-nano/wiki/FPGA-SDRAM-Communication:-Introduction

zangman's avatar
zangman
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

Thanks Anil! I was really in the dark as I didn't know where to begin. After a fair bit of research, I figured out what is needed:

  • We need to enable the f2h_sdram0_data in the HPS in platform designer. This interface includes Avalon Slaves with the Burst interface
  • Create an Avalon MM Master that supports burst interface to interact with the SDRAM
  • Regarding DMA: A DMA is used to save CPU cycles by moving memory from one location to another. It's not needed for my requirements as I just want to access something in SDRAM and do something immediately with it.

I started documenting all the steps in great detail at the link below. It's still a WIP but hopefully will be able to finish it soon and somebody new to SoCs (like myself) will find it useful:

https://github.com/zangman/de10-nano/wiki/FPGA-SDRAM-Communication:-Introduction