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Altera_Forum
Honored Contributor
Honored ContributorDE0-Nano project has warning about interface voltages
I have a simple project created by the System Builder application included with my DE0-Nano. That application creates QPF, QSF, and SDC files as well as an example Verilog file. If I compile the proj...
Altera_ForumHonored Contributor
Honored ContributorAFAIK you always get this warning, as long as you are using 3.3/3.0/2.5-V I/O standards. There is no way to get rid of it.
