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Hi,
I'm new with De-0 Nano board and I have a problem.
I created an easy vhdl project, loaded it through the '.sof' file and it functions well.
However I converted the .sof into '.jic' file (following the instructions in the datasheet of the board), but it doesn't function as the '.sof' one! When the FPGA is powered on, it doesn't function as it should...
Why it happens? Are there some constrains in the serial flash loader that limits some funtionalities?
Thank for the kind reply,
Alessandro
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I have been using the DE-Nano for quite some time now, and have successfully programmed the Flash (EPCS64) many times by JTAG Indirect Configuration (.jic). My suggestion to you is to make sure that you have the correct FPGA device and Flash memory specified in the programming tool for the .jic file, which is Cyclone IV device, 22K, and the EPCS64. Other than that, it is most likely a hardware problem if the FPGA does not configure to the same as the .sof on power up.
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