Occasional ContributorI wonder if the polarity of DQS signal can be inverted inside FPGA (not HPS), for example, bank 3F or 3H.
The DQS_P and DQS_N connection are reversed at one DDR4 device side and there 4 DDR4 devices forming a 64 bit memory bank.
Hope to hear from ASAP. Thank you.
Regular ContributorHi Sir,
Thanks for posting your question in Intel Community.
Unfortunately, you cannot change the polarity of the DQS signal.
Regards,
Adzim
Occasional ContributorHi Adzim,
Appreciate quick response.
I know the DQS P/N pins can not be changed or swapped.
I meant inverting DQS in the VHDL or Verilog code, for example, somewhere in the MIG, like put a NOT gate.
ASAP, thank you.
Regular ContributorHi Sir,
I don't think you can do that due to timing related issue.
Besides, the signals are harden circuitry that you not able to change it.
Regards,
Adzim
Super ContributorI'm presuming you're using a hard controller and PHY. If so, no, you can't do that. You wouldn't want to either due to extra delay.
