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Occasional Contributor

6 years ago

DDR3 controller soft controller IP on Cyclone V GT Nios example design

Hi, I am trying to run the example design of Ethernet_main_system using NIOSII in qsys for cyclone V GT board. I have few queries regarding the DDR3 controller IP used in the same: 1) The DDR3 cont...

MEIYAN_L_Intel

Frequent Contributor

6 years ago

Hi,

I am checking the information internally for the first and second question.

For the third question, the advantages of using soft controller is maximum flexibility to choose memory interface and support wider interface.

For more information, you could refer to document as link below:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/wp/wp-01188-hard-memory-controller-cv.pdf

Thanks

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DDR3 controller soft controller IP on Cyclone V GT Nios example design

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