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Altera_Forum's avatar
Altera_Forum
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18 years ago

CYCLONEIII NIOS II Dev Kit Issue

Hi Guys,

I am new, so please excuse my ignorance if any.

I just got the CIII NII kit with the multimedia card from TerAsic.

The standard sopc file has the SD/MMC card module for which we

dont have a license.

I removed the SD/MMC module and generated a system with SOPC

builder. I then found that for some reason, the LED group is 2 bit.

I changed it to 4 bit (there are 4 LEDs on board) and generated the

system again. Great!!! so far so good. I now have a system

without SD/MMC, but it can use all the 4 LEDs on the board.

I imported the generated system in the Quartus project and opened

the pin configurator to map the two new LED bits that I had just added.

I mapped the 2 new led bits (LED[2] and LED[3]). I also noted that

LED[1] was not mapped to the pin mentioned in the reference manual for

some reason. I remapped LED[1] to the right pin. LED[0] was already

mapped to the right pin. So finally my LED pins were as below.

LED[0] P13 (BANK4) <-- This bit is correct, no changes

LED[1] P12 (BANK4) <-- Bit I corrected, was on the wrong pin

LED[2] N12 (BANK4) <-- Bit I added

LED[3] N9 (BANK3) <-- Bit I added

I then synthesized the system and had a successful Synthesis.

Great!!! So far so good.

I then ran the fitter and my problems started. I got an error that

said there were 10 output/bidirectional pins on a certain IO BANK

and that the maximum cannot be more than 9. Just to be sure, I

went and checked every single pin on the Buttons, Parallel Flash,

SSRAM, DDR SDRAM, HSMC connector and found that every pin

is connected to the pins mentioned in the reference manual. This

means that you can never have all the peripherals connected to

valid pins at a time the way the kit's hardware is setup currently.

How to get around this issue? Help please. Altera are you reading

this?

Rajah:confused:

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    18 years ago

    The "number of outputs" problem only arises for outputs in a Vref group with voltage referenced inputs, e. g. SSTL-2 used with DDR2 memory. You obviously revealed why not all LEDs had been connected. Actually there is a trick for outputs not toggling during normal operation. You make Quartus fitter ignore these pins in placement rules check by specifying a toggle rate 0 as discussed in AN 466, Cyclone III Design Guidelines on page 16.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    18 years ago

    Thanks for the note FvM. After playing with Quartus for a while, I finally found the place to

    change the toggle rates. Initially the pins were set to LOCATION - <PIN# >. I changed them

    to Toggle Rate and set the freq to 0Hz. I tried the fitter again with no luck. Still the same

    error. I hope I did the right thing. Am I missing something?

    --- Quote Start ---

    The "number of outputs" problem only arises for outputs in a Vref group with voltage referenced inputs, e. g. SSTL-2 used with DDR2 memory. You obviously revealed why not all LEDs had been connected. Actually there is a trick for outputs not toggling during normal operation. You make Quartus fitter ignore these pins in placement rules check by specifying a toggle rate 0 as discussed in AN 466, Cyclone III Design Guidelines on page 16.

    --- Quote End ---