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Cyclone V Transceiver Native PHY IP Core
Hello, by the Cyclone V Transceiver Native PHY IP Core is the Transceiver Reconfiguration Controller optional ? can i left the Reconfiguration output signals Open and the inputs putted to zero.
PS . I don't need to dynamically change reference clocks, PLL connectivity, and the channel configurations at runtime.
4 Replies
- SengKok_L_Intel
Regular Contributor
Hi,
Even if there are no reconfigurations at runtime, this still needs to connect the Transceiver Reconfiguration controller to the Native PHY. You can't just leave it open without connecting or put to zero.
Regards -SK
- S_Healthineers
New Contributor
Thanks for the quick response SK Lim,
is it enough if I connect the transceiver with the reconfiguration controller and control only the mgmt_clk_clk and mgmt_rst_reset ? or i have to do also something with the communication interface read/write ?
- SengKok_L_Intel
Regular Contributor
Yes, you just need to hook up the signals accordingly, and control only the clk and reset signals will do.
Regards -SK Lim
- S_Healthineers
New Contributor
Thanks SK Lim 😊