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RHenr's avatar
RHenr
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

[Cyclone V HPS] Enable Transmit/Receive Checksum offload in Ethernet MAC

Hello, we are trying to enable Checksum Offload Engine (COE) / IPC Full Offload in our Cyclone V HPS. Here is what we have done so far: Use 32 bytes transmit/receive descriptors and set the ATD...
EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

I apologize, I have checked from the Technical Reference Manual provided in my previous reply, the default bits are suppose that the Type 1 is by default is disabled and only Type 2 and the TX checksum is enabled.

Have you try a reset if this solves the issue? Just for confirmation can you share your kernel version that you are using?

I may need some more time to dig in for more information regarding this issue.