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LeonardoG's avatar
LeonardoG
Icon for New Contributor rankNew Contributor
16 hours ago

Cyclone V GT Dev Kit - new units fail to boot from FPP

We have been using this development kit internally for many years, and on our last order 2 out of 3 units fail to boot using the Fast Passive Parallel (FPP) configuration scheme through the MAX V. W...
Board Debug
Fpga Devkit
GordWait's avatar
GordWait
Icon for Occasional Contributor rankOccasional Contributor
4 hours ago

I just discovered the same thing on the factory design constraints. The FPGA config pins are entirely unconstrained. The Max5 part can have siginificant internal delays so this is not good..