Cyclone III Development board errata

You can see in the schematic that LCD_CONT is only connected to the LCD module and the voltage divider. It has no direct or indirect connection to a FPGA pin. So it won't appear in FPGA pin list or *.qsf file. To make the contrast programmable, you would e.g. connect three resistors in a binary graduation (1:2:4 R) between the voltage divider tap and FPGA outputs. But I don't see the purpose for an evaluation board, may be for a retail product.