Forum Discussion

VStrakh's avatar
VStrakh
Icon for New Contributor rankNew Contributor
4 years ago

Cyclone 10LP Evaluation Kit interface to MAX 10 System Controller

Hi. Is there any specifications for the interfaces between Cyclone 10LP and MAX10 devices on the Intel Cyclone 10LP Evaluation Kit? The "golden system reference design" projects defines a couple...
AR_A_Intel's avatar
AR_A_Intel
Icon for Super Contributor rankSuper Contributor
4 years ago

Hello

Welcome to INTEL forum. There is no special specifications for the interfaces connection between Cyclone 10LP and MAX10 devices on the Intel Cyclone 10LP Evaluation Kit. it’s just regular IO connection between 2 FPGA


  • VStrakh's avatar
    VStrakh
    Icon for New Contributor rankNew Contributor
    4 years ago

    Those lines can't be a regular IO, they are not exposed on the external connectors, and there are no ways to put your own design into the MAX10 device to make use of those IOs.

    As a matter of fact, exactly the same interface could be found on another Intel kit - DK-DEV-10M50-A, connecting the main MAX10 device and the MAX II CPLD. And it's also not exposed to board connectors and not described.

    Both these kits have a common distinction from all the other boards with onboard USB BLASTER II, they do have two USB interfaces, not just one. And it's my guess that the presence of one extra USB interface in the USB device description (as seen with USBView) has to be connected to the fact that there's a FIFO-like interface defined between the main FPGA and the chip implementing USB interfaces.

    It's hard to believe two kits produced at the different time would have the same idea designed into the hw just to be left abandoned.