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Ms_G's avatar
Ms_G
Icon for New Contributor rankNew Contributor
2 years ago

Cyclone 10 LVDS on DIFFCLK lines

HI,

Can I use DIFFCLK_[0..7]p and DIFFCLK_[0..7]n pairs as LVDS input pins on Cyclone 10 LP device?

Thanks

Fpga Devkit

5 Replies

  • FvM's avatar
    FvM
    Icon for Super Contributor rankSuper Contributor
    2 years ago
    Hi,
    according to my reading of pinout table, it's not possible.
  • Ms_G's avatar
    Ms_G
    Icon for New Contributor rankNew Contributor
    2 years ago

    Thanks FvM, Can I use atleast as Input pins to read push buttons or dip switches.

    • FvM's avatar
      FvM
      Icon for Super Contributor rankSuper Contributor
      2 years ago

      Yes, free clock inputs can be used as single ended inputs. Other than regular IO they don't provide weak-pullup resistors for unused pins, thus unused clocks should be connected to ground, as stated in pin connection guideline and Quartus .pin file.

  • AqidAyman_Altera's avatar
    AqidAyman_Altera
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.