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Ms_G's avatar
Ms_G
Icon for New Contributor rankNew Contributor
2 years ago

Cyclone 10 LVDS on DIFFCLK lines

HI, Can I use DIFFCLK_[0..7]p and DIFFCLK_[0..7]n pairs as LVDS input pins on Cyclone 10 LP device? Thanks
Fpga Devkit
FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
2 years ago
Hi,
according to my reading of pinout table, it's not possible.