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Annu's avatar
Annu
Icon for New Contributor rankNew Contributor
2 years ago

Cyclone 10 LP FPGA

Could you please elaborate on the ESD protection provided in the Cyclone 10 LP devices(Other than the data provided in the platform(ESD Performance (intel.com)).
Board Debug
AqidAyman_Altera's avatar
AqidAyman_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

I think, since the datasheet for Cyclone 10 LP has shown that the passing voltage for GPIO using Human Body Model (HBM) is +-2000V and using Charged Device Model (CDM) is +-500V, then if static discharging voltage is at 15 kV, it may need additional mechanism to withstand the ESD event.