Cyclone 10 gx PCIe with DDR3 interface through BAR[2] using avalon mm dma reference design not able to map the bar.? fpga_dma 0000:01:00.0: could not map BAR[2]

Hie, My apologies, I provided an update sometime back, but it seemed did not get into the system. I checked with the reference design using Quartus Prime Pro 18.0 and did not observe the mentioned error. Could you attach your reference design, for me to check. Regards, Nathan