Cyclone 10 GX Development Kit ddr problem

Hi David,

1. Can you share with me your dev kit board purchased invoice and board serial number so that I can check for eligibility of warranty claim ?

But before I can approve for dev kit RMA claim, I need to perform some debug with you first to ensure this is really defective dev kit board issue

1. I forgot to ask you is this an FPGA ES silicon board or FPGA production silicon board ?
2. Have you cross check to ensure all the on board jumper setting is set to default setting location as per user manual doc ?
3. Did you change any clock frequency setting on clock controller GUI ? Pls restore it back to default clock frequency
4. Did you observe any potential physical damage or loose component on the board ?
5. May I know how you validate DDR3 example design calibration failure ? Did you see afi_cal_success signal stay low while afi_cal_fail signal went high ?
6. Does lowering down DDR3 operating frequency from 933MHz to 800MHz helps to make the calibration passed ? I expect 800MHz test run to fail as well if there is damaged chip on the board

Thanks.

Regards,

dlim