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PVanL's avatar
PVanL
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Cyclone® 10 GX Avalon streaming Hard IP for PCIe* Design Example

I am building this design example. I have two problems: ONE: reference to file in modelsim.tcl do msim_setup.tcl # ** Error: couldn't read file "./../common/./../../../../pcie_example_design...
BoonT_Intel's avatar
BoonT_Intel
Icon for Frequent Contributor rankFrequent Contributor
5 years ago

Hi Pieter,


I don't understand how you specify C10. Ok, now let's assume you generate the example design using Arria 10 variant. Then after that how you specify C10?

Also, I notice there are some folder hierarchy changed in newer version compare to 18.0. May you can give a try on newer quartus version like 20.1/2.

Anyway, from my side I can run the simulation successfully. I just generate the ED using C10 variant, and just follow the normal flow to run the simulation without changing anything including "specify new device".


Thanks