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SATC's avatar
SATC
Icon for Occasional Contributor rankOccasional Contributor
6 years ago
Solved

Create a Block Symbol File from a Verilog Code in a Cyclone 10 GX board.

Good afternoon guys, I'm trying to create a schematic block file of the program I made, but the option appears as "disabled". I am using the Quartus Prime Pro Edition IDE, I have tried to generate this file for many different projects and this option is not always available. Does anyone know if anything needs to be enabled in the Quartus Prime settings? I used the same programs in Quartus II 13.0 and it worked. Apparently the problem is occurring when I use the prime version.

Below is an image to illustrate the unavailability situation.

  • Vicky1's avatar
    Vicky1
    6 years ago

    Hi,

    Apologies for the inconvenience, I have already raised this concern to next level & it might take some time.

    Regards,

    Vicky.

10 Replies

  • Vicky1's avatar
    Vicky1
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Hi,

    your intended feature is"Create Symbol files from current file" might be removed from Intel Quartus prime pro edition but it it still available in Lite & Standard edition of the Quartus tool, please refer the below screenshot of Q18.1std edition.

    In fact, here none of the feature is active under 'Create/Update' option for Quartus Prime Pro edition & it seems to be a bug, let me check with team internally & it may take some time to fix that issue.

    Regards,

    Vicky

    • SATC's avatar
      SATC
      Icon for Occasional Contributor rankOccasional Contributor
      6 years ago

      Hi Vicky, the same error is also found in Quartus Prime 17.1 version beyond 19.1

    • SATC's avatar
      SATC
      Icon for Occasional Contributor rankOccasional Contributor
      6 years ago

      Any news on this subject?

      • Vicky1's avatar
        Vicky1
        Icon for Regular Contributor rankRegular Contributor
        6 years ago

        Hi,

        Apologies for the inconvenience, I have already raised this concern to next level & it might take some time.

        Regards,

        Vicky.

  • FPGAYE's avatar
    FPGAYE
    Icon for New Contributor rankNew Contributor
    4 years ago

    Hello, this same issue is always there in 2021

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    3 years ago

    You can't in Pro. The feature does not exist. As mentioned, you could install Standard to do this, which is a pain, but it would work.

    • User1010's avatar
      User1010
      Icon for New Contributor rankNew Contributor
      3 years ago

      Hi sstrell,

      Thank you for the reply. May I know if this feature doesn't exist, (other than doing it on the standard version), how can I go about building my project if I needed to design a huge project with many modules that contain my own VHDL code? I am using an Agliex F-series board, so I can't use the standard edition.

      • sstrell's avatar
        sstrell
        Icon for Super Contributor rankSuper Contributor
        3 years ago
        You’d have to write code and perform manual instantiations in that code instead of using a schematic.