Forum Discussion
SATC
Occasional Contributor
6 years agoCreate a Block Symbol File from a Verilog Code in a Cyclone 10 GX board.
Good afternoon guys, I'm trying to create a schematic block file of the program I made, but the option appears as "disabled". I am using the Quartus Prime Pro Edition IDE, I have tried to generate th...
- 6 years ago
Hi,
Apologies for the inconvenience, I have already raised this concern to next level & it might take some time.
Regards,
Vicky.
sstrell
Super Contributor
4 years agoYou can't in Pro. The feature does not exist. As mentioned, you could install Standard to do this, which is a pain, but it would work.
User1010
New Contributor
4 years agoHi sstrell,
Thank you for the reply. May I know if this feature doesn't exist, (other than doing it on the standard version), how can I go about building my project if I needed to design a huge project with many modules that contain my own VHDL code? I am using an Agliex F-series board, so I can't use the standard edition.
- sstrell4 years ago
Super Contributor
You’d have to write code and perform manual instantiations in that code instead of using a schematic.