Hello,
I am sorry for late reply. I was out sick for last few weeks.
The calculated CRC value is stored in the 32-bit storage register with 32-bit pre-computed CRC signature at the end of the configuration stage. The signature is then loaded into the 32-bit Compute and Compare CRC block during user mode to calculate the CRC error. This register forms a 32-bit scan chain during execution of the CHANGE_EDREG JTAG instruction.
If you check the Error Detection Block diagram, there is no access to this 32-bit storage register.
link : https://www.intel.com/content/www/us/en/docs/programmable/683865/current/error-detection-block.html
regards,
Farabi