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PShetty's avatar
PShetty
Icon for New Contributor rankNew Contributor
7 years ago

Clock sharing between the Arria 10 Transceiver Banks

Hi, We have Arria 10 SoC design,where we are using 4 high speed transceiver channels from each bank(1E,1F,1C,1D) . 4 Transceiver PHY IPs are used to configure the 4 channels from each banks. My ques...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
7 years ago

Hi,

Sorry for the delay. ​If I understand it correctly, the 4 XCVR banks that you are referring to are on the same side of the device. For your information, you can use one refclk to drive all the XCVR channels on the same side of device. You may try to create a simple test design and run through Fitter to further verify.

Thank you.