Clock generator on DE0-Nano-SoC

The clock generator is part of the "system" so it has not been placed on the board to be used by the end user. This chip generates all the clocks needed for the FPGA, ARM core and other parts of the system, which require low jitter clock signals. You cannot reprogram it unless you hack into the I2C lines with something like bus pirate and changes its configuration. If the I2C lines are not connected to anything, by guess would be Terasic probably have this chip pre-programmed.