New ContributorHello,
I am using couple of ALTDDIO_OUT channels in Cyclone 10 LP and map them onto true LVDS pins. Is there a way to get the channel to channel skew analysis by the Timing Analyzer ? when I try the 'Reprt TCCS' I get 'No dedicated SERDES Transmitter circuitry present in device or used in design'. Is there another way to get the skew ?
Thank you.
Frequent ContributorHi ,
Is it possible to see the report from the Qaurtus for cylcone 10 LP the TCCS specification is given in data sheet page no:27
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-10/c10lp-51002.pdf
New ContributorThank you. But this is the datasheet. I am interested in the actual value that comes up from the design.
Frequent ContributorTo answer your question , the TCCS value will be provided only for the serdes , you can find the calculation from the IO user guide of c10lp
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-10/c10lp-51003.pdf
Frequent ContributorHi ,
Kindly let me know if you need further assistance.
New ContributorHi, Thank you. No need for further assistance.
