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Altera_Forum
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11 years ago

CFI Flash + Stratix V DSP Development Kit

Hi, I am working with a project which is built around a Stratix V DSP Development Kit. In the system design there is a Nios processor with which I have had problems with the on-chip memory hold...
Altera_Forum's avatar
Altera_Forum
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11 years ago

Well, I tried changing the NIOS reset vector in Qsys to have an offset 0x071c0000, a real address of 0x0F1C0000. Then if I run the following command: 


elf2flash --base=0x08000000 --end=0x0FFFFFFF --reset=0x0F1C0000 --input=../software/PCIeUltrasound/PCIeUltrasound.elf --output=PCIeUltrasound_sw.flash --boot=$SOPC_KIT_NIOS2/components/altera_nios2/boot_loader_cfi.srec --verbose

It appears to create a flash file where all of the addresses are correct. So it appears that the 'base' value is subtracted from the 'reset' value by elf2flash when it is generating the file. Good to know. I will have to test this on Monday.

But then the question remains, what is the correct address? Do I go with what is in the latest version of the user guide, or do I go with what was in the original one, given that the original one works for the sof file.