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CAlex's avatar
CAlex
Icon for Contributor rankContributor
2 years ago
Solved

Can't set LoanIO by FPGA ,cycloneVsoc Dev kit

Hi, There is a IDC 2*7 on the board, the pins are HPS pins,here is the schematic Most of them are connnected to the HPS Bank7. In HPS settings, I set the GPIO 58,59,60 as loanIOs(5,7 ...
Board Debug
Fpga Devkit
  • CAlex's avatar
    CAlex
    1 year ago

    Hi,

    thanks for the reply , problem is solved, I sent the 313MHZ signal instead of 313KHZ, the GPIO pin with 3.3 LVTTL std dont have such high bandwidth.

    When I set to 313KHZ the result is good.

    Reguards

    Alex

aikeu's avatar
aikeu
Icon for Regular Contributor rankRegular Contributor
1 year ago

Hi CAlex,


Thanks for your sharing the root cause of your issue. It was helpful as I never thought of that as a cause for signal related issue.

I will close the thread for now.


Thanks again.

Regards,

Aik Eu