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AWann1's avatar
AWann1
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Can't implement HSMC on CycV Soc Dev Board

Hello, I'm using the supplied project and golden_top .v files for the Cyclone V SoC board. I'm just writing out a memory file through the HSMC bus, using the already defined pins. However, I get t...
AWann1's avatar
AWann1
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Ah, I found my problem. I had instantiated the negative side of the bus manually in my IO declarations. When assigning a bus the LVDS standard, that is unnecessary, as Quartus handles that for you. Once I removed the negative side, my errors went away