SKacc
New Contributor
New ContributorCan we able to operate system clock of FPGA with 25MHz or 50MHz input?
Arria V Device Overview(AV-51001) says the input reference clock ranges from 27MHz to 710MHz.
Forum Discussion
AnandRaj_S_Intel
Regular Contributor
Regular ContributorHi,
That is a max frequency that you can have for the global or regional clock.
- You can have a 25 MHz or 50 MHz system/global clock for FPGA. And use PLL to generate the required clock frequency for other design modules
