Forum Discussion

OADAM1's avatar
OADAM1
Icon for New Contributor rankNew Contributor
6 years ago

CAN I USED LVDS PIN IN THE GPIO CONNECTOR IN THE CYCLON 10 EVM BOARD .THE VCCIO OF LVDS IS MENTION IN THE DATA SHEET AS 2.5 VOLT .BUT ALL THE GPIO THAT COME FROM J13 CONNECTOR OF THE EVM BOARD THEIR VCCIO IS 3.3 VOLT?

3 Replies

  • AnandRaj_S_Intel's avatar
    AnandRaj_S_Intel
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Hi @OADAM1​ ,

    No, All GPIO signals are 3.3V single-ended LVCMOS/LVTTL signals who are connected to Intel FPGA directly.

    Regards

    Anand

  • OADAM1's avatar
    OADAM1
    Icon for New Contributor rankNew Contributor
    6 years ago

    hi Anand

    thank you for your answer .

    I was wrong with the designator of the connector in the CYCLON 10 LP evm for GPIO HEADER , the designator it J10 not JP13. but I think that your answer will be the same . am I correct?

    ofer israel adam

    • AnandRaj_S_Intel's avatar
      AnandRaj_S_Intel
      Icon for Regular Contributor rankRegular Contributor
      6 years ago

      ​Hi,

      Yes you are correct, I was able to understand that Question was related to cyclone 10LP evaluation kit and GPIO designator J10 was typo mistake.

      All GPIO signals GPIO[0:35] are 3.3V single-ended LVCMOS/LVTTL signals who are connected to Intel Cyclone 10 LP FPGA directly. hence we can't use it as LVDS pin.

      Regards

      Anand