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mjuneja2007's avatar
mjuneja2007
Icon for Occasional Contributor rankOccasional Contributor
1 year ago
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Building DDR controller Example Design - Component DDR over Agilex board

Hello I am trying to build a DDR controller example design for DDR component memory using Agilex FPGA board - DK-DEV-AGI027-RA. - I have already created example design as described using "External ...
Fpga Devkit
  • AdzimZM_Altera's avatar
    AdzimZM_Altera
    1 year ago

    Hi Madhur,


    Please download the DK-DEV-AGI027-RA/RA-B installer package from the devkit website.

    DK-DEV-AGI027-RA/RA-B (v24.3.1 or higher)

    The serial number that you have shared is belong to this devkit.

    Agilex™ 7 FPGA I-Series Development Kit (Production 2x R-Tile & 1x F-Tile)

    (Power Solution 2)

    		DK-DEV-AGI027-RAAGIB027R29A1E1VB8100505

    Please try to generate the example design based on this devkit and DDR4 setting from this devkit.

    Or you can use the existing design in this devkit file.


    You also may test the devkit with BTS application but need to use with Quartus version 24.3.1.

    From the BTS, you can quick check if there is any error during read and write process of the DDR4 interface.


    Regards,

    Adzim


mjuneja2007's avatar
mjuneja2007
Icon for Occasional Contributor rankOccasional Contributor
1 year ago

Hello Adzim

I compared the example design in the link you shared with my design. I found the pin mapping to be very different.

I was referring to the below schematic.

https://www.intel.com/content/dam/support/us/en/programmable/support-resources/bulk-container/support/boards-kits/agilex/agilex-agi027-devkit-schematic-reva1-apr2021.pdf

While the example design in your link https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/agi027.html refer to different schematic (attached in board design files)

Please confirm which one is correct.

And yes I have enabled "EMIF Debug Toolkit in EMIF IP" in the IP and I am using Quartus version 23.4.3.1.

Note: in the meantime I will generate the SOF file using example design you shared and test it on the board.

Regards

Madhur