Avalon MM FiFO csr_in and csr_out not working

​Hi, I made the following setup. But my fifo write is working fine but fifo read is not working fine. Here is sample output

62

Please enter a number:

45

you entered the value :45

root@socfpga_cyclone5:~# ./customfifoloopback4write

Please enter a number:

46

you entered the value :46

root@socfpga_cyclone5:~# ./customfifoloopback4write

Please enter a number:

47

you entered the value :47

root@socfpga_cyclone5:~# ./customfifoloopback4write

Please enter a number:

48

you entered the value :48

root@socfpga_cyclone5:~# ./customfifoloopback4write

Please enter a number:

49

you entered the value :49

root@socfpga_cyclone5:~# ./customfifoloopback4write

Please enter a number:

60

you entered the value :60

root@socfpga_cyclone5:~# ./customfifoloopback4write

Please enter a number:

61

you entered the value :61

root@socfpga_cyclone5:~# ./customfifoloopback4write

Please enter a number:

62

Now when I read back data it is like just one number while I want to read out whole of the fifo

////////////////////////////

the output value from the fifo is 62

/////////////////////////////

////////////////////////////

the output value from the fifo is 62

/////////////////////////////

////////////////////////////

the output value from the fifo is 62

/////////////////////////////

////////////////////////////

the output value from the fifo is 62

/////////////////////////////

////////////////////////////

the output value from the fifo is 62

/////////////////////////////

////////////////////////////

the output value from the fifo is 62

/////////////////////////////

////////////////////////////

the output value from the fifo is 62

/////////////////////////////

////////////////////////////

the output value from the fifo is 62

Here is c code for read and write

#define REG_BASE 0xFF200000
#define REG_SPAN 1024
 
void* virtual_base;
volatile unsigned int * FIFO_write_ptr;
 
unsigned int value;
 
int main ()
{
	
int fd = EXIT_FAILURE;	
fd=open("/dev/mem",(O_RDWR|O_SYNC));
if (fd < 0) {
		perror("open");
		exit(EXIT_FAILURE);
			}	
virtual_base=mmap(NULL,REG_SPAN,(PROT_READ|PROT_WRITE),MAP_SHARED,fd,REG_BASE);
if (virtual_base == MAP_FAILED) {
		perror("mmap");
	}
FIFO_write_ptr=(unsigned int *)(virtual_base+FIFO_0_IN_BASE);
 
printf("Please enter a number: \n");
scanf("%i",&value);
*FIFO_write_ptr=value;
printf("you entered the value :%i\n",*FIFO_write_ptr);
return 0;
}

#define REG_BASE 0xFF200000
#define REG_SPAN 1024
 
void* virtual_base;
volatile unsigned int * FIFO_read_ptr;
int i;
 
int main ()
{
	
int fd = EXIT_FAILURE;	
fd=open("/dev/mem",(O_RDWR|O_SYNC));
if (fd < 0) {
		perror("open");
		exit(EXIT_FAILURE);
			}	
virtual_base=mmap(NULL,REG_SPAN,(PROT_READ|PROT_WRITE),MAP_SHARED,fd,REG_BASE);
if (virtual_base == MAP_FAILED) {
		perror("mmap");
	}
FIFO_read_ptr=(unsigned int *)(virtual_base+FIFO_0_OUT_BASE);
 
for(i=0;i<8;i++)
{
	//reading data from the fifo
	printf("////////////////////////////\n");
	printf("the output value from the fifo is %d\n",*FIFO_read_ptr);
	printf("/////////////////////////////\n");
}
return 0;
}