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Altera_Forum
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17 years ago

Audio CODEC AIC23 vhdl/verilog

Hello, We have a Altera EP2S60 development board (http://www.altera.com/products/devkits/altera/kit-dsp-2s60.html) , which has a Stratix II FPGA and AIC23 Audio CODEC. Altera does not have any contro...
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Altera_Forum
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17 years ago

what happens to R channel in the above 4-tap averaging filter design. To hear the filtered output in the real time implementation on hardware,

does R channel remain unconnected

Or is it filtered the same way as L channel

Or If I do dac_data_R <= adc_data_R; (pass it as such)